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Avery Design Debuts CXL™ 2.0 System-level VIP Simulation Solution

Avery Design Debuts CXL™ 2.0 System-level VIP Simulation Solution

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Avery Design Debuts CXL™ 2.0 System-level VIP Simulation Solution

Tewksbury, MA., April 15, 2021 – Avery Design Systems, a leader in functional verification solutions, today announced its CXLTM 2.0 system-level simulation solution. The comprehensive offering supports the co-simulation of a CXL-aware Linux kernel and QEMU x86 virtual host system emulator with its SystemVerilog CXL Host VIP. The solution enables pre-silicon hardware-software validation of CXL 2.0 Type 3 memory expansion system designs, accelerating development time and providing an efficient approach to customization and application development for systems using the CXL 2.0 interface standard

To view the full announcement, including downloadable images, bios, and more, click here.

Key Takeaways:

  • New VIP supports pre-silicon validation of systems using CXL 2.0 interface standard
  • Supports QEMU open-source software emulation methodology
  • Enables efficient hardware/software verification to accelerate development cycles, reduce debug time, ensure compliance

Click image above to view full announcement.

Contacts:

Christopher Browy

(978) 851-3627

cbrowy@avery-design.com

Toni Sottak

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(843) 530-4442

toni@wiredislandpr.com

Source: Avery Design Systems

Distributed by: Reportable, Inc.

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